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Preliminary GS78132AB BGA Commercial Temp Industrial Temp Features
* Fast access time: 8, 10, 12 ns * CMOS low power operation: 260/210/180 mA at minimum cycle time * Single 3.3 V 0.3 V power supply * All inputs and outputs are TTL-compatible * Byte control * Fully static operation * Industrial Temperature Option: -40 to 85C * 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array package
256K x 32 8Mb Asynchronous SRAM
Pin Descriptions Symbol
A0 to A17 CE DQA1 TO DQA8 DQB1 TO DQB8 DQC1 TO DQC8 DQD1 TO DQD8 BA BB BC BD WE OE VDD VSS NC
8, 10, 12 ns 3.3 V VDD
Description
Address input Chip enable input Byte A Data input/output Byte B Data input/output Byte C Data input/output Byte D Data input/output Byte A Byte enable input Byte B Byte enable input Byte C Byte enable input Byte D Byte enable input Write enable input Output enable input +3.3 V power supply Ground No connect
Description
The GS78132A is a high speed CMOS Static RAM organized as 262,144-words by 32-bits. Static design eliminates the need for external clocks or timing strobes. The GS78132A operates on a single 3.3 V power supply, and all inputs and outputs are TTL-compatible. The GS78132A is available in a 14 mm x 22 mm BGA package.
Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A17 CE WE Control OE ____ Bx
Column Decoder
I/O Buffer
DQ1
DQ32
Rev: 1.00 2/2003
1/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB 256K x 32 Async SRAM in 119-bump, 14 mm x 22 mm BGA
Top View
1 A B C D E F G H J K L M N P R T U NC BC DQC6 DQC5 DQC4 DQC3 DQC2 DQC1 VDD DQD1 DQD2 DQD3 DQD4 DQD5 DQD6 BD NC 2 A15 A11 NC VDD DQC8 VDD DQC7 VDD VSS VDD DQD7 VDD DQD8 VDD NC A7 A3 3 A14 A10 VDD, NC VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD VSS NC A6 A2 4 A16 CE A17 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS NC WE OE 5 A13 A9 VSS, NC VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD VSS NC A5 A1 6 A12 A8 NC VDD DQB8 VDD DQB7 VDD VSS VDD DQA7 VDD DQA8 VDD NC A4 A0 7 NC BB DQB6 DQB5 DQB4 DQB3 DQB2 DQB1 VDD DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 BA NC
Note: Bumps 3C and 5C are actually NC's but should be wired 3C = VDD and 5C = Vss to assure compatibility with future versions.
Rev: 1.00 2/2003
2/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Truth Table CE OE WE BA BB BC BD
H X X X L H L L H L L L L H L X L L L L L L H X H X X H X L L H L L L L H L L X H X L L L H L L L L H L X H X L L L L H L L L L H X H
DQA1-A8
Not Selected Read High Z Read Read Read Write High Z Write Write Write High Z High Z
DQB1-B8
Not Selected Read Read High Z Read Read Write Write High Z Write Write High Z High Z
DQC1-C8
Not Selected Read Read Read High Z Read Write Write Write High Z Write High Z High Z
DQD1-D8
Not Selected Read Read Read Read High Z Write Write Write Write High High Z High Z
Supply Current
ISB1, ISB2
IDD
Note: X: "H" or "L"
Absolute Maximum Ratings
Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
VDD VIN VOUT PD TSTG
Rating
-0.5 to +4.6 -0.5 to VDD +0.5 ( 4.6 V max.) -0.5 to VDD +0.5 ( 4.6 V max.) 1.5 -55 to 150
Unit
V V V W
oC
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.00 2/2003
3/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB Recommended Operating Conditions
Parameter
Supply Voltage for -8/10/12 Input High Voltage Input Low Voltage Ambient Temperature, Commercial Range Ambient Temperature, Industrial Range
Symbol
VDD VIH VIL TAc TAi
Min
3.0 2.0 -0.3 0 -40
Typ
3.3 -- -- -- --
Max
3.6 VDD +0.3 0.8 70 85
Unit
V V V
o
C C
o
Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than -2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance Output Capacitance
Symbol
CIN COUT
Test Condition
VIN = 0 V VOUT = 0 V
Max
10 7
Unit
pF pF
Notes: 1. Tested at TA = 25C, f = 1 MHz 2. These parameters are sampled and are not 100% tested
DC I/O Pin Characteristics
Parameter
Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage
Symbol
IIL IOL VOH VOL
Test Conditions
VIN = 0 to VDD Output High Z, VOUT = 0 to VDD IOH = -4 mA IOL = +4 mA
Min
-2 uA -1 uA 2.4
Max
2 uA 1 uA
0.4 V
Rev: 1.00 2/2003
4/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Power Supply Currents Parameter Symbol Test Conditions
E VIL All other inputs VIH or VIL Min. cycle time IOUT = 0 mA E VIH All other inputs VIH or VIL Min. cycle time E VDD - 0.2V All other inputs VDD - 0.2V or 0.2V
0 to 70C 8 ns 10 ns 12 ns 8 ns
-40 to 85C 10 ns 12 ns
Operating Supply Current
IDD
260 mA
210 mA
180 mA
280 mA
230 mA
200 mA
Standby Current
ISB1
60 mA
50 mA
50 mA
80 mA
70 mA
70 mA
Standby Current
ISB2
20 mA
40 mA
AC Test Conditions
Parameter
Input high level Input low level Input rise time Input fall time Input reference level Output reference level Output load
Conditions
VIH = 2.4 V VIL = 0.4 V tr = 1 V/ns tf = 1 V/ns 1.4 V 1.4 V Fig. 1& 2
Output Load 1
DQ 50 VT = 1.4 V 30pF1
Output Load 2
3.3 V DQ 5pF1 589 434
Notes: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
AC Characteristics
Rev: 1.00 2/2003
5/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Read Cycle 1:CE = OE = VIL , WE = VIH, BA = BB = BC = BD = VIL
tRC Address tAA tOH Data Out Previous Data Data valid
Read Cycle 2: WE = VIH
tRC Address tAA CE tAC tLZ tAB tBLZ tOE Data Out tOLZ High impedance tBHZ tOHZ Data valid tHZ
BA, BB, BC, BD
OE
* These parameters are sampled and are not 100% tested
Rev: 1.00 2/2003
6/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Write Cycle 1: WE Controlled
tWC Address tAW OE tCW CE tBW tAS tWP tDW Data In tWHZ Data Out tDH tWR
BA, BB, BC, BD
WE
Data valid tWLZ High impedance
Write Cycle 2: CE Controlled
tWC Address tAW OE tAS CE tCW tWR1
BA, BB, BC, BD
tWP WE
tBW
tDW Data In Data Out
tDH
Data valid
High impedance
Rev: 1.00 2/2003
7/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Write Cycle 3: Byte Enable Controlled
tWC Address tAW CE tAS CE tCW tWR1
BA, BB, BC, BD
tWP WE
tBW
tDW Data In Data Out
tDH
Data valid
High impedance
Rev: 1.00 2/2003
8/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB Package Dimensions - 119-bump PBGA
Pin 1 Corner
A
7654321
G
P
B
S
D
A B C D E F G H J K L M N P R T U
N
Top View
R Bottom View
Package Dimensions - 119 Pin PBGA
Symbol Description Min. Nom. Max
T
A B C D E F G K N P R S T Unit: mm
Width Length Package Height (including ball) Ball Size Ball Height Package Height (excluding balls) Width between Balls Package Height above board Cut-out Package Width Foot Length Width of package between balls Length of package between balls Variance of Ball Height
13.8 21.8 0.60 0.50
14.0 22.0 0.75 0.60 1.46 1.27
14.2 22.2 2.40 0.90 0.70 1.70 1.00
0.80
0.90 12.00 19.50 7.62 20.32 0.15
F
Side View
BPR 1999.05.18
Rev: 1.00 2/2003
C
E
K
9/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Ordering Information Part Number*
GS78132AB-8 GS78132AB-10 GS78132AB-12 GS78132AB-8I GS78132AB-10I GS78132AB-12I GS78132AB-15I
Package
BGA BGA BGA BGA BGA BGA BGA
Access Time
8 ns 10 ns 12 ns 8 ns 10 ns 12 ns 15 ns
Temp. Range
Commercial Commercial Commercial Industrial Industrial Industrial Industrial
Status
* Customers requiring delivery in Tape and Reel should add the character "T" to the end of the part number. For example: GS78132AAB-12T
Rev: 1.00 2/2003
10/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Preliminary GS78132AB
Revision History Rev. Code: Old; New
GS78132AB_r1
Types of Changes Format or Content
Page #/Revisions/Reason
* Creation of new datasheet
Rev: 1.00 2/2003
11/11
(c) 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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